1. Field of the Invention
This invention relates to an energy recovering apparatus and method for a plasma display panel, and more particularly to an energy recovering apparatus and method for a plasma display panel that is capable of supplying a sustain pulse having a rapid rising time.
2. Description of the Related Art
Recently, there has been developed various flat panel devices that are capable of reducing a heavy weight and a large bulk, which are drawbacks of the cathode ray tube (CRT). Such flat panel display devices include a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP) and an electro-luminescence display (ELD), etc.
The PDP of these flat panel display devices is a display device using a gas discharge, and has an advantage in that it is easy to manufacture a large-dimension panel. The PDP typically includes a three-electrode, alternating current (AC) surface discharge PDP that has three electrodes and is driven with an AC voltage as shown in FIG. 1.
Referring to FIG. 1, a discharge cell of the conventional three-electrode, AC surface-discharge PDP includes a first electrode 12Y and a second electrode 12Z provided on an upper substrate 10, and an address electrode 20X provided on a lower substrate 18.
On the upper substrate 10 provided with the first electrode 12Y and the second electrode 12Z in parallel, an upper dielectric layer 14 and a protective film 16 are disposed. Wall charges generated upon plasma discharge are accumulated into the upper dielectric layer 14. The protective film 16 prevents a damage of the upper dielectric layer 14 caused by a sputtering during the plasma discharge and improves the emission efficiency of secondary electrons. This protective film 16 is usually made from magnesium oxide (MgO).
A lower dielectric layer 22 and barrier ribs 24 are formed on the lower substrate 18 provided with the address electrode 20X. The surfaces of the lower dielectric layer 22 and the barrier ribs 24 are coated with a fluorescent material 26. The address electrode 20X is formed in a direction crossing the first electrode 12Y and the second electrode 12Z. The barrier rib 24 is formed in parallel to the address electrode 20X to prevent an ultraviolet ray and a visible light generated by a discharge from being leaked to the adjacent discharge cells. The phosphorous material 26 is excited by an ultraviolet ray generated during the plasma discharge to generate any one of red, green and blue visible light rays. An inactive gas for a gas discharge is injected into a discharge space defined between the upper and lower substrate 10 and 18 and the barrier rib 24.
Such a three-electrode, AC surface discharge PDP is driven with being separated into a number of sub-fields. In each sub-field interval, a light emission having a frequency proportional to a weighting value of a video data is conducted to provide a gray scale display. The sub-field is again divided into an initialization period, an address period, a sustain period and an erasure period.
Herein, the initialization period is a period for forming uniform wall charges on the discharge cell. The address period is a period for generating a selective address discharge in accordance with a logical value of the video data. The sustain period is a period for allowing a discharge cell in which the address discharge has been generated to sustain a discharge. The erasure period is a period for erasing a sustain discharge generated in the sustain period.
The address discharge and the sustain discharge of the AC surface-discharge PDP driven in the above manner requires a high voltage more than hundreds of volts. Accordingly, an energy recovering apparatus is used for the purpose of minimizing a driving power required for the address discharge and the sustain discharge. The energy recovering apparatus recovers a voltage between the first electrode 12Y and the second electrode 12Z, to thereby use the recovered voltage as a driving voltage upon the next discharge.
Referring to FIG. 2, energy recovering apparatus 30 and 32 of the PDP having been suggested by U.S. Pat. No. 5,081,400 of Weber are symmetrically arranged with respect to each other with having a panel capacitor Cp therebetween. The panel capacitor Cp is an equivalent expression of a capacitance formed between the first electrode Y and the second electrode Y. The first energy recovering apparatus 30 applies a sustain pulse to the first electrode Y. The second energy recovering apparatus 32 operates alternately with respect to the first energy recovering apparatus 30 to thereby apply a sustain pulse to the second electrode Z.
Hereinafter, configurations of conventional energy recovering apparatus of the PDP will be described with reference to the first energy recovering apparatus 30.
The first energy recovering apparatus 30 includes an inductor L connected between a panel capacitor Cp and a source capacitor Cs, first and third switches S1 and S3 connected, in parallel, between the source capacitor Cs and the inductor L, and second and fourth switches S2 and S4 connected, in parallel, between the panel capacitor Cp and the inductor L.
The second switch S2 is connected to a sustain voltage source VS while the fourth switch S4 is connected to a ground voltage source GND. The first to fourth switches S1 to S4 control a current flow.
The source capacitor Cs recovers and charges a voltage charged in the panel capacitor Cp upon sustain discharge and re-supply the charged voltage to the panel capacitor Cp. The source capacitor Cs is charged with a voltage Vs/2 equal to a half value of the sustain voltage source Vs.
The inductor L forms a natural resonance circuit along with the panel capacitor Cp. At this time, the conventional energy recovering apparatus allows a step of storing energy into the inductor L to overlap with a step of supplying the panel capacitor Cp with the energy stored in the inductor L.
Meanwhile, fifth and sixth diodes D5 and D6 provided between the first and second switches S1 and S2 and the inductor L, respectively prevent a current from flowing in a backward direction.
FIG. 3 is a timing diagram and a waveform diagram representing an on/off timing of switches in the first energy recovering apparatus and an output waveform of the panel capacitor.
An operation procedure of the energy recovering apparatus will be described assuming that 0 volt has been charged in the panel capacitor Cp and a Vs/2 voltage has been charged in the source capacitor Cs prior to a T1 interval.
In a T1 interval, the first switch S1 is turned on, to thereby form a current path extending from the source capacitor Cs, via the first switch S1, the inductor L, into the panel capacitor Cp. If the current path is formed, then a Vs/2 voltage charged in the source capacitor Cs is applied to the panel capacitor Cp. At this time, a Vs voltage equal to twice the voltage of the source capacitor Cs is charged in the panel capacitor Cp because the inductor L and the panel capacitor Cs form a serial resonance circuit.
In a T2 interval, the second switch S2 is turned on. If the second switch S2 is turned on, then a voltage of the sustain voltage source Vs is applied to the first electrode Y. The voltage of the sustain voltage source Vs applied to the first electrode Y prevents a voltage Vcp of the panel capacitor Cp from falling into less than the sustain voltage source Vs to thereby cause a normal sustain discharge. Meanwhile, since the voltage Vcp of the panel capacitor Cp has risen into Vs in the T1 interval, a driving power supplied from the exterior for the purposing of causing the sustain discharge is minimized.
In a T3 interval, the first switch S1 is turned off. At this time, the first electrode Y sustains a voltage of the sustain voltage source Vs during the T3 interval. In a T4 interval, the second switch S2 is turned off while the third switch S3 is turned off. If the third switch S3 is turned off, then a current path extending from the panel capacitor Cp, via the inductor L and the third switch S3, into the source capacitor Cs is formed to recover a voltage Vcp charged in the panel capacitor Cp into the source capacitor Cs. At this time, a Vs/2 voltage is charged in the source capacitor Cs.
In a T5 interval, the third switch S3 is turned while the fourth switch S4 is turned on. If the fourth switch S4 is turned on, then a current path between the panel capacitor Cp and the ground voltage source GND is formed, thereby allowing the voltage Vcp of the panel capacitor Cp to 0 volt. In a T6 interval, the T5 state is maintained during a certain time. In real, an alternating current driving pulse supplied to the first electrode Y and the second electrode Z allows the T1 to T6 intervals to be obtained with repeating periodically.
In the mean time, the second energy recovering apparatus 32 operates alternately with respect to the first energy recovering apparatus 30. Accordingly, a sustain pulse voltage Vs having a mutually contrary polarity is applied to the panel capacitor Cp. The sustain pulse voltage Vs having a mutually contrary polarity is applied to the panel capacitor Cp is applied, so that a sustain discharge can be generated from the discharge cells.
However, such conventional energy recovering apparatus 30 and 32 have a problem in that the first energy recovering apparatus 30 provided at the first electrode (Y) side and the second energy recovering apparatus 32 provided at the second electrode (Z) side operate individually to require many circuit elements such as a switching device, etc., and thus to raise a manufacturing cost. Furthermore, a lot of power consumption is caused by a conduction loss of a plurality of switches, such as a diode, a switch device and an inductor, etc., on the current path.
Meanwhile, referring to FIG. 4, an energy recovering apparatus for a plasma display panel suggested by U.S. Pat. No. 5,670,974 of NEC corporation includes a panel capacitor 40 equivalently representing a capacitance formed between a scanning electrode and a sustain electrode of the plasma display panel 1, and a charging/discharging circuit 2 and a voltage clamp circuit 3 connected in parallel with the panel capacitor Cp. Particularly, the charging/discharging circuit 2 includes a coil 8 connected in parallel with the panel capacitor 40 of the panel 1 to re-charge a reverse polarity of a resonant current generated when the panel capacitor 40 is discharged, and two switches 12 and 13. The switches 12 and 13 form a bi-directional switch with respect to the coil 8. One side of the panel capacitor 40 is connected, in series, to the two switches 12 and 13 formed from N-channel FET's controlled by different switch drive inputs IN5 and IN6 supplied to their respective gate terminals and reverse current blocking diodes 10 and 11 connected in series with the respective switches 12 and 13. Other side of the panel capacitor 40 is connected to one end of the parallel circuit having the coil 8 and a resistor 9. To the other end of the parallel circuit, the other terminal of the diodes 10 and 11 are connected commonly. The panel capacitor 40 of the panel 1 and the charging/discharging circuit 2 form a parallel resonance circuit. The resistor 9 connected in parallel with the coil 8 of the charging/discharging circuit 2 is a damping resistor provided for the purpose of preventing an oscillation of a waveform.
The voltage clamp circuit 3 includes first to fourth switches 4, 5, 6 and 7, of which the first and third switches 4 and 6 are respectively connected between one of two terminals of the panel capacitor 40 and power source terminals GND and −VS while the second and fourth switches 5 and 7 are respectively connected between the other of the terminals of the panel capacitor 40 and the power source terminals GND and −VS. The first and second switches 4 and 5 are P-channel FET's, and the third and fourth switches 6 and 7 are N-channel FET's. The switches 4, 6 and the switches 5, 7 form the CMOS type circuit structures, respectively. In such an energy recovering apparatus for the plasma display panel, while causing parallel resonance with the parallel resonance circuit formed by the panel capacitor 40 of the panel 1 and the coil 8 in the charging/discharging circuit 2, the clamping is repeated with the operation of the switches 4 to 7, thus reducing the ineffective power.
FIG. 5 is a waveform diagram representing drive voltage and drive current waveforms in the panel shown in FIG. 5. Referring to FIG. 5, waveforms IN1 to IN6 are input waveforms for operating the switches 4 to 7 and FET switches 12 and 13 shown in FIG. 4. A waveform VCP is of the terminal voltage across the panel capacitor 40 and a waveform IL is of the current through the coil 8.
Specifically, an operation procedure will be described assuming that electric charges has never been charged in the panel capacitor 40 of the panel at t=0 prior to the A′ period.
In the A′ period, if the second switch 4 and the fourth switch 7 are turned on, then a current path extending from the ground voltage source GND, via the first switch 4, the panel capacitor 40 and the fourth switch 7, into a reverse voltage source −VS are formed as shown in FIG. 6A. If the current path is formed in this manner, then electric charges are charged in the panel capacitor 40.
In the B period, if the switch 12 is turned on, then a current path extending from one end of the panel capacitor 40, via the coil 8, the diode 10 and the switch 12, into other end of the panel capacitor 40 is formed as shown in FIG. 6B. If the current path is formed in this manner, then a discharge current from the panel capacitor 40 is applied to the coil 8. At this time, an inverse electromotive force is produced across the coil 8, thus generating a resonant current IL. Subsequently, when the current through the panel capacitor 40 reaches zero, the voltage VCP on the panel capacitor 40 becomes the maximum inverse voltage −VS.
In the C period, with the application of the maximum inverse voltage −VS across the panel capacitor 40, the second switch 5 and the third switch 6 are turned off to thereby form a current path extending from the ground voltage source GND, via the second switch 5, the panel capacitor 40 and the third switch 6, into the inverse voltage source −VS as shown in FIG. 6C. If the current path is formed in this manner, then one end of the third switch 6 in the panel capacitor 40 is clamped to the inverse voltage −VS. At this time, a polarity of the panel capacitor 40 becomes an inverse polarity in the A′ period.
In the D period, the switch 13 is turned on after the second and third switches 5 and 6 were turned off. Accordingly, in the D period, a current path extending from other end of the panel capacitor 40, via the switch 13 and the coil 8, into one end of the panel capacitor 40 is formed as shown in FIG. 6D. If the current path is formed in this manner, then electric charges stored in the panel capacitor 40 is discharged through the coil 8. In other words, a reverse current IL flows in the B period. When the voltage VCP of the panel capacitor 40 is raised to become zero, the maximum current flows through the coil 8. Accordingly, the panel capacitor 40 is charged again to the opposite polarity.
Finally, in the A period, when the re-charge of the inverse voltage into the panel capacitor 40 has been finished by a reverse electromotive force, then the switch 13 is turned off while the first and fourth switches 4 and 7 are turned on as shown in FIG. 6E. Accordingly, electric charges of the panel capacitor 40 are maintained until the next cycle. Then, the panel capacitor 40 are repetitively operated from the A′ period into until the D period.
As described above, the energy recovering apparatus for the PDP can reduce a charging/discharging power of the panel capacitor 40 with the aid of a resonance action in which timings of the panel capacitor 40, the coil 8 and individual switches are controlled, and can recover most of the ineffective power in a cycle until the next cycle with a reduced number of parts.
However, the energy recovering apparatus suggested by U.S. Pat. No. 5,679,094 of NEC corporation requires an energy recovering circuit and a sustain circuit for each of the scanning electrode and the sustain electrode of the plasma display panel 1 to thereby cause a complex circuit configuration. Accordingly, it has a problem in that a manufacturing cost rises. Furthermore, a conduction loss of a plurality of switches on the current path in the energy recovering apparatus suggested by U.S. Pat. No. 5,679,094 is smaller than that in the energy recovering apparatus suggested by U.S. Pat. No. 5,081,400, but causes a lot of power consumption due to the conduction loss of the switches.